How are autonomous microcontroller unit peripherals utilized in edge applications?
While edge computing devices are designed with limited onboard resources, embedded developers explore various techniques to reduce power consumption. Despite several techniques, such as technology scaling (finer process nodes), clock-gating and suspension, static voltage scaling, RAM, and digital state retention, autonomous peripheral operation remains the top priority.
In recent years, as industries increasingly integrate edge computing to enhance operational efficiency, it has become crucial for engineering teams to ensure that the peripherals do not significantly drain the main CPU’s processing power. The adoption of microcontroller architectures with smart autonomous peripherals represents a step forward to push the boundaries of ultra-low-power embedded system design.
By allowing the MCU core to enter a suspended or sleep state while peripherals perform specific functions, these devices can carry out tasks independently or along other cores. These tasks range from data acquisition and input/output operations to basic processing, all while the CPU remains in power-saving sleep mode. This approach has led to a reduction in power consumption, achieved without relying on complex interrupt service routines or real-time operating system (RTOS) software.
NXP MCX A microcontroller with intelligent peripherals
NXP has introduced the MCX A, an all purpose microcontroller that is designed for a wide range of applications that prioritize low energy consumption. Inside the MCU is the Arm Cortex-M33 core platform and supports autonomous peripherals, much like those found in the MCX N series microcontrollers. Ming Lin, the director of product management for secure connected edge at NXP, notes that the MCX N Series is a superset of the autonomous MCU peripherals over MCX A.
Lin further explains how these peripherals are used to improve the functionality of the MCX A microcontroller in applications requiring real-time responsiveness. The peripheral input MUX facilitates the interaction between different peripherals, enabling one to trigger actions in another. For instance, a pulse-width modulation signal can initiate an analog-to-digital converter sampling at precise time, which is often useful for motor control applications. Another example of this cross-triggering capabilities includes a timer that can trigger a comparator to periodically sample voltage levels across various channels for monitoring and control tasks.
For operations that need to conserve power, the microcontroller’s deep sleep mode allows certain low-power peripherals, like UART, SPI, and I2C, to remain active and functional. These peripherals have the capability to wake up the MCU under specific circumstances, such as when the FIFO buffer is empty, new data is received, or a specific data pattern is matched. Additionally, the ADC can be set to sample periodically by a timer even when the MCU is in deep sleep mode.
Autonomous peripherals within these systems have the capability to directly access and manipulate data in memory through a direct memory access (DMA) channel. This enables most peripherals to initiate DMA requests, which allows them to transfer data directly to and from memory without CPU intervention. Also, an asynchronous DMA feature allows for the DMA to activate the MCU from deep sleep mode to perform a data transfer, all while keeping the PCU in its dormant state. Once the data transfer concludes, the MCU can return to deep sleep mode automatically.
In the development of the MCX N series microcontroller, NXP integrated the low-power FlexCOMM feature, an advancement built upon the low-power UART, SPI, and I2C peripherals. This FlexCOMM provides a flexible communication interface, which is compatible with the individual UART, SPI, and I2C.
Furthermore, the MCX A microcontrollers use AOI (application output interrupt), which is a subset of the functionality provided by EVTG (event trigger logic). The AOI provides a mechanism for developers to establish complex logical conditions for triggering interrupts or other specific actions. On the other hand, the EVTG supports even more complex event triggering and control scenarios, improving the ability to handle complex system events and responses.
Outlook on intelligent peripherals for edge computing
The need for low-power embedded designs remains constant, driving companies to continuously innovate the existing power-saving techniques. The flexibility built into the MCU architectures has enabled them to advance in smart peripheral technology.
Currently most intelligent peripherals within MCUs operate such that a single peripheral carries out a simple task, allowing the majority of the MCU core to remain in a power-efficient state. The future evolution of autonomous peripherals involves linking multiple peripheral tasks to execute more sophisticated functions, all without requiring the active participation of the MCU core.
Article Topics
CPU | edge applications | edge computing | microcontroller | NXP Semiconductors
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