AMD to support edge computing applications with Spartan UltraScale+ FPGA family launch
AMD has announced the launch of the AMD Spartan UltraScale+ FPGA family, marking the latest addition to its Cost-Optimized FPGAs and adaptive SoCs.
Aimed at delivering efficient performance in a variety of I/O-intensive applications at the edge, the Spartan UltraScale+ devices boast the industry’s highest I/O to logic cell ratio in FPGAs built in 28nm and lower process technology, alongside a significant reduction in total power consumption compared to the previous generation, and an enhanced set of security features within the AMD Cost-Optimized portfolio. It has been introduced to replace the Xilinx Spartan 6 and Spartan 7 lines.
Tailored for edge computing applications, the Spartan UltraScale+ FPGAs offer high I/O counts and flexible interfaces to integrate with multiple devices or systems, according to the company.
Kirk Saban, corporate vice president of the adaptive and embedded computing group at AMD, comments: “For over 25 years, the Spartan FPGA family has contributed to some of humanity’s most notable achievements, ranging from life-saving automated defibrillators to the CERN particle accelerator pushing the boundaries of human knowledge.
“Building on proven 16nm technology, the Spartan UltraScale+ family’s enhanced security features, common design tools, and extended product lifecycles further solidify our market-leading FPGA portfolio and underscore our commitment to delivering cost-optimized products for customers.”
AMD says the utilization of proven 16nm fabric and support for a range of packaging options, starting as small as 10x10mm, ensures high I/O density in an ultra-compact footprint. Moreover, the AMD FPGA portfolio offers scalability, allowing customers to initiate with cost-optimized FPGAs and progress to midrange and high-end products.
The Spartan UltraScale+ family is anticipated to provide up to a 30 percent reduction in power consumption compared to the 28nm Artix 7 family, leveraging 16nm FinFET technology and hardened connectivity. These FPGAs also mark the introduction of the first AMD UltraScale+ FPGAs with a hardened LPDDR5 memory controller and PCIe Gen4 x8 support, offering both power efficiency and future-ready capabilities for customers.
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